Espressif Systems /ESP32-S2 /RTC_CNTL /EXT_XTL_CONF

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Interpret as EXT_XTL_CONF

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (XTAL32K_WDT_EN)XTAL32K_WDT_EN 0 (XTAL32K_WDT_CLK_FO)XTAL32K_WDT_CLK_FO 0 (XTAL32K_WDT_RESET)XTAL32K_WDT_RESET 0 (XTAL32K_EXT_CLK_FO)XTAL32K_EXT_CLK_FO 0 (XTAL32K_AUTO_BACKUP)XTAL32K_AUTO_BACKUP 0 (XTAL32K_AUTO_RESTART)XTAL32K_AUTO_RESTART 0 (XTAL32K_AUTO_RETURN)XTAL32K_AUTO_RETURN 0 (XTAL32K_XPD_FORCE)XTAL32K_XPD_FORCE 0 (ENCKINIT_XTAL_32K)ENCKINIT_XTAL_32K 0 (DBUF_XTAL_32K)DBUF_XTAL_32K 0DGM_XTAL_32K 0DRES_XTAL_32K 0 (XPD_XTAL_32K)XPD_XTAL_32K 0DAC_XTAL_32K 0WDT_STATE 0 (XTAL32K_GPIO_SEL)XTAL32K_GPIO_SEL 0 (XTL_EXT_CTR_LV)XTL_EXT_CTR_LV 0 (XTL_EXT_CTR_EN)XTL_EXT_CTR_EN

Description

32 kHz crystal oscillator configuration register

Fields

XTAL32K_WDT_EN

Set this bit to enable the 32 kHz crystal watchdog.

XTAL32K_WDT_CLK_FO

Set this bit to FPU the 32 kHz crystal watchdog clock.

XTAL32K_WDT_RESET

Set this bit to reset the 32 kHz crystal watchdog by SW.

XTAL32K_EXT_CLK_FO

Set this bit to FPU the external clock of 32 kHz crystal.

XTAL32K_AUTO_BACKUP

Set this bit to switch to the backup clock when the 32 kHz crystal is dead.

XTAL32K_AUTO_RESTART

Set this bit to restart the 32 kHz crystal automatically when the 32 kHz crystal is dead.

XTAL32K_AUTO_RETURN

Set this bit to switch back to 32 kHz crystal when the 32 kHz crystal is restarted.

XTAL32K_XPD_FORCE

Set 1 to allow the software to FPD the 32 kHz crystal. Set 0 to allow the FSM to FPD the 32 kHz crystal. (R/W)

ENCKINIT_XTAL_32K

Applies an internal clock to help the 32 kHz crystal to start.

DBUF_XTAL_32K

0: single-end buffer 1: differential buffer

DGM_XTAL_32K

xtal_32k gm control

DRES_XTAL_32K

DRES_XTAL_32K

XPD_XTAL_32K

XPD_XTAL_32K

DAC_XTAL_32K

DAC_XTAL_32K

WDT_STATE

Stores the status of the 32 kHz watchdog.

XTAL32K_GPIO_SEL

Selects the 32 kHz crystal clock. 0: selects the external 32 kHz clock. 1: selects clock from the RTC GPIO X32P_C.

XTL_EXT_CTR_LV

0: powers down XTAL at high level 1: powers down XTAL at low level

XTL_EXT_CTR_EN

Enables the GPIO to power down the crystal oscillator.

Links

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